Computer Hardware & Engineering#
Table of Contents#
Resources#
Tools & Technologies
Ben Eater
[ y ]
01-07-2024. Ben Eater. “A simple BIOS for my breadboard computer”.[ y ]
11-23-2023. Ben Eater. “Adapting WozMon for the breadboard 6502”.[ y ]
07-08-2023. Ben Eater. “How Wozniak’s code for the Apple 1 works”.[ y ]
06-03-2023. Ben Eater. “Running Apple 1 software on a breadboard computer (Wozmon)”.[ y ]
03-11-2023. Ben Eater. “6502 serial interface”.[ y ]
02-04-2023. Ben Eater. “Let’s build a voltage multiplier!”.[ y ]
11-21-2022. Ben Eater. “Hacking a weird TV censoring device”.[ y ]
11-05-2022. Ben Eater. “The RS-232 protocol”.[ y ]
11-13-2021. Ben Eater. “How do hardware timers work?”.[ y ]
06-05-2021. Ben Eater. “How does a USB keyboard work?”.
Nerd’s Lesson
[ y ]
01-16-2021. Nerd’s Lesson. “Computer Architecture Complete course Part 1”.[ y ]
01-16-2021. Nerd’s Lesson. “Computer Architecture Complete Course Part 2”.[ y ]
01-16-2021. Nerd’s Lesson. “Computer Architecture Complete course Part 3”.
more
Texts#
Fujitaki, Kazuhiro; Matsuda; & Trend-Pro Co, Ltd. (2009). The Manga Guide to Electricity. No Starch Press.
Hyde, Randall. (2020). Write Great Code, Volume 1: Understanding the Machine. 2e. No Starch Press.
Justice, Matthew. (2020). How Computers Really Work: A Hands-On Guide to the Inner Workings of the Machine. No Starch Press.
Merrick, Russell. (2023). Getting Started with FPGAs: Digital Circuit Design, Verilog, and VHDL for Beginners. No Starch Press.
Plantz, Robert G. (2024). Introduction to Computer Organization: ARM. No Starch Press.
Plantz, Robert G. (2022). Introduction to Computer Organization: An Under the Hood Look at Hardware and x86-64 Assembly. No Starch Press.
Scott, Hunter. (2024). Designing Electronics That Work. No Starch Press.
Shibuya, Michio; Takashi Tonagi; & Office Sawa. (2017). The Manga Guide to Microprocessors. No Starch Press.
Steinhart, Jonathan E. (2019). The Secret Life of Programs: Understand Computers–Craft Better Code. No Starch Press.
Figures#
[ w ]
1937-2019Cohen, Danny
Terms#
[ w ] 4-Bit Computing
[ w ] Accumulator
[ w ] Adder
[ w ] Address Generation Unit (AGU)
[ w ] Addressing Mode
[ w ] Application Binary Interface (ABI)
[ w ] Application-Specific Integrated Circuit (ASIC)
[ w ] Amdahl’s Law
[ w ] Arithmetic Logic Unit (ALU)
[ w ] ARM
[ w ] ASIC Prototyping
[ w ] Base64
[ w ] Binary Multiplier
[ w ] Binary-Coded Decimal (BCD)
[ w ] Binary-to-Text Encoding
[ w ] Bit
[ w ] Bit Numbering
[ w ] Bitwise Operation
[ w ] Block Diagram
[ w ] Bootloader
[ w ] Branch
[ w ] Breadboard
[ w ] Bus
[ w ] Byte
[ w ] Byte Addressing
[ w ] Cache Storage
[ w ] Central Processing Unit (CPU)
[ w ] Circuit
[ w ] Circuit Diagram
[ w ] Client
[ w ] Clock Generator
[ w ] Clock Multiplier
[ w ] Clock Rate
[ w ] Clock Signal
[ w ] Combinational Logic
[ w ] Complex Instruction Set Computer (CISC)
[ w ] Complex Programmable Logic Device (CPLD)
[ w ] Computer
[ w ] Computer Architecture
[ w ] Computer Arithmetic
[ w ] Computer Engineering
[ w ] Computer Hardware
[ w ] Computer-Aided Design (CAD)
[ w ] Computing
[ w ] Configurable Logic Block (CLB)
[ w ] Control Unit (CU)
[ w ] CPU Cache
[ w ] Crystal Oscillator
[ w ] Cursor
[ w ] Data-Flow Diagram
[ w ] Data Storage
[ w ] Datapath
[ w ] Desktop
[ w ] Digital Signal
[ w ] Disk Storage
[ w ] Duty Cycle
[ w ] EEPROM
[ w ] Electronic Circuit
[ w ] Electronic Design Automation (EDA)
[ w ] Endianness
[ w ] Execute Instruction
[ w ] Explicitly Parallel Instruction Computing (EPIC)
[ w ] Field-Effect Transistor (FET)
[ w ] Field-Programmability
[ w ] Field-Programmable Analog Array (FPAA)
[ w ] Field-Programmable Gate Array (FPGA)
[ w ] Floating-Point Unit (FPU)
[ w ] FPGA Prototyping
[ w ] Flip Flop
[ w ] Glue Logic
[ w ] Graphical User Interface (GUI)
[ w ] Graphics Processing Unit (GPU)
[ w ] Half-Byte
[ w ] Hard Disk Drive (HDD)
[ w ] Hardware
[ w ] Hardware Acceleration
[ w ] Hardware Architecture
[ w ] Hardware Description Language (HDL)
[ w ] Harvard Architecture
[ w ] Illegal Opcode
[ w ] Indirect Branch
[ w ] Input/Output (I/O)
[ w ] Input Device
[ w ] Instruction-Level Parallelism (ILP)
[ w ] Instruction Cycle
[ w ] Instruction Set Architecture (ISA)
[ w ] Integrated Circuit (IC)
[ w ] Keyboard
[ w ] Latch
[ w ] Latency
[ w ] Load-Store Architecture
[ w ] Load-Store Unit
[ w ] Logic Block
[ w ] Logic Gate
[ w ] Long Multiplication
[ w ] Machine Code
[ w ] Memory
[ w ] Memory Cell
[ w ] Memory Hierarchy
[ w ] Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)
[ w ] Microarchitecture
[ w ] Microcomputer
[ w ] Microcontroller
[ w ] Microprocessor
[ w ] Microprocessor without Interlocked Pipelined Stages (MIPS)
[ w ] Minimal Instruction Set Computer (MISC)
[ w ] Mixed-Signal Integrated Circuit
[ w ] Monitor
[ w ] Moore’s Law
[ w ] Mouse
[ w ] Multiplexor (MUX)
[ w ] Multiplication Algorithm
[ w ] Multiply-Accumulate
[ w ] Nibble
[ w ] Octet
[ w ] Offset
[ w ] One-Instruction Set Computer (OISC)
[ w ] Opcode
[ w ] Opcode Table
[ w ] Operating System (OS)
[ w ] Output Device
[ w ] Parallel Communication
[ w ] Peripheral Device
[ w ] Personal Computer (PC)
[ w ] Place and Route
[ w ] Position-Independent Code (PIC)
[ w ] Predication
[ w ] Printed Circuit Board (PCB)
[ w ] Printer
[ w ] Processor
[ w ] Processor Design
[ w ] Processor Register
[ w ] Program
[ w ] Program Counter (PC)
[ w ] Programmable Array Logic (PAL)
[ w ] Programmable Logic Device (PLD)
[ w ] Programmable Read-Only Memory (PROM)
[ w ] Random Access Memory (RAM)
[ w ] Reconfigurable Computing
[ w ] Reduced Instruction Set Computer (RISC)
[ w ] Register
[ w ] Register-Memory Architecture
[ w ] Repeat Instruction
[ w ] Semiconductor
[ w ] Sequential Logic
[ w ] Serial Communication
[ w ] Server
[ w ] Software
[ w ] Solid-State Drive (SSD)
[ w ] Status Register
[ w ] Stored-Program Computer
[ w ] Synchronous Circuit
[ w ] System on a Chip (SoC)
[ w ] SoC Prototyping
[ w ] Transistor
[ w ] Two’s Complement
[ w ] Verilog
[ w ] Very Long Instruction Word (VLIW)
[ w ] Von Neumann Architecture
[ w ] Word
[ w ] Word Addresing
[ w ] x86
[ w ] x86-64